1. Field of the Invention
The present invention relates to a semiconductor device, and in particular, to a semiconductor device that stores data in a nonvolatile manner using transistors or the like formed on an SOI (Silicon on Insulator) substrate.
2. Description of the Background Art
Semiconductor devices capable of storing information by injecting or drawing electrons into/from a floating gate, e.g., flash memory, have been developed. In connection with the flash memory, it is necessary to add a process step of forming the floating gate to normal CMOS (Complementary Metal Oxide Semiconductor) process steps, for example.
In order to eliminate the necessity of adding the process step, for example, Jaroslav Raszka et al., “Embedded Flash Memory for Security Applications in a 0.13 μm CMOS Logic Process”, ISSCC 2004, SESSION 2, NON-VOLATILE MEMORY, IEEE, 2004 (Non-Patent Document 1) discloses a nonvolatile memory cell, which includes three elements in total, i.e., a P channel MOS transistor formed on an N type well and two capacitors formed on N type wells, each elements being insulation-isolated by STI (Shallow Trench Isolation). In the nonvolatile memory cell, a coupling node of the gate electrode of the P channel MOS transistor and the two capacitors correspond to the floating gate.
However, in the configuration using a bulk substrate such as the nonvolatile memory cell disclosed by Non-Patent Document 1, it is necessary to insulation-isolate the N type wells on which the three elements are formed and to separately control the applied voltages to the N type wells. As a result, there has been a problem that the cell size is increased and large capacity cannot be attained.